1. Field of the Invention
The present invention relates to an analysis method for semiconductor LSI circuit electrostatic discharge (ESD) and a program for the same.
2. Description of the Related Art
In order to analyze semiconductor LSI circuit electrostatic discharge a shortest path determination method or a convex flow analysis has been carried out for an electrostatic discharge protection network made up of protection elements and parasitic resistances extracted from a layout of a semiconductor LSI circuit. Inter-pad voltages and current paths when applying ESD current between pads are calculated.
According to this analysis method, analysis is carried out based on a layout. Therefore, that analysis may only be carried out after completion of a layout design. As a result of an analysis, detection of a failure may require considerable back tracking and repeating of the design process. In addition, data must be extracted from a layout, resulting in an increase in data size and difficulty in processing.